1. Field of the Invention
The present invention generally relates to a capacitor sheet and an electronic circuit board and especially to a capacitor sheet and an electronic circuit board for removing noises from LSI and the like on an electronic circuit board of general electronic devices including communication devices.
The present invention is used to remove high-frequency and low-frequency noises from electronic components such as LSIs mounted on electronic devices. Such noises may cause not only the generation of malfunctions in the electronic components but also negative influences on peripheral electronic components, so that a method for removing noises in which compatibility between performances and costs is ensured has been required.
2. Description of the Related Art
FIG. 1 is a perspective view showing an example of a communication apparatus requiring the removal of noises from LSIs and the like. A communication apparatus 101 shown in the drawing includes plural plug-in units 102 having an electronic circuit board 102a in which an LSI is mounted and a subrack 103 into which the plug-in units 102 are inserted for installation. The subrack 103 is stored in a subrack installation rack 104.
In the communication apparatus 101, the plug-in unit 102 is inserted into the subrack 103, a connector 102b of the plug-in unit 102 is connected to a backplane connector (omitted in the drawing) disposed in the subrack 103 and the plug-in unit 102 is electrically connected to the subrack 103.
FIGS. 2 and 3 are diagrams showing the plug-in unit 102 to which the conventional electronic circuit board 102a is applied. FIG. 2A is a rear view of the plug-in unit 102 and FIG. 2B is a front view of the plug-in unit 102. FIG. 3A is an enlarged view showing an area indicated by an arrow A of FIG. 2A and FIG. 3B is an enlarged view showing an area indicated by an arrow B of FIG. 2B.
As shown in each diagram, conventionally, a large number of capacitors 106 for removing noises (capacitor chips for high frequency and capacitor chips for low frequency) are mounted in the vicinity of an area where an LSI 105 of the electronic circuit board 102a is disposed and on a reverse side of the area where the LSI 105 is disposed.
With the acceleration of processing speed of the LSI 105, dealing with high-frequency noises of an LSI electrode has posed a problem. Conventionally, such a problem is handled by mounting a chip capacitor with good high-frequency characteristics on the vicinity of a terminal electrode of a power source of the LSI 105.
However, due to a high density of mounting in an electronic circuit on the electronic circuit board 102a, the mounting of a sufficient number of capacitors 106 with sufficient capacity has become difficult. Further, the mounted capacitor 106 has a long connection wiring distance to the terminal electrode of the LSI 105 due to a peripheral electronic circuit mounted in a high-density manner, leading wiring, through-holes, and the like in the vicinity of the power source of the LSI 105 and a terminal electrode for grounding. Thus, resistance components and inductance components of the connection wiring cannot be ignored and it is difficult to obtain sufficient electric characteristics.
In practice, an area in the vicinity of the LSI 105 is allocated to the capacitors 106 as large as possible so that many capacitors 106 are mounted using a minimal wiring. However, when the number of mounted capacitors is increased, a cost of members to be mounted and a processing cost thereof are increased. This may lead to high costs and an increase of failure rate, thereby degrading reliability.
FIG. 4 is a diagram showing the frequency characteristics of a capacitor. Usually, a capacitor for high-frequency noises has a high resonance frequency and small ESR and ESL. As described above, when a connection wiring distance between the capacitor 106 and the terminal electrode of the LSI 105 is increased, the effects of resistance components (ESR) and inductance components (ESL) of the connection wiring are added. Thus, it is difficult to obtain electric characteristics as originally expected.
In recent years, the use of a capacitor sheet as disclosed in Patent Documents 1 and 2 has been proposed as a method for solving such problems.
Patent Document 1: Japanese Laid-Open Patent Application No. 2002-25856
Patent Document 2: Japanese Laid-Open Patent Application No. 2002-83892
However, conventional capacitor sheets as disclosed in Patent Documents 1 and 2 are problematic in that such sheets are for exclusive use dependent on the pin arrangement (arrangement of terminal electrodes of signals, power source, and grounding) of each LSI and versatility cannot be provided. Further, conventional capacitor sheets have a sheet configuration such that the capacitor is formed between a single specific power source and a single specific ground. Thus, such sheets are problematic in that they cannot support an LSI with plural power sources.